Epitaxial Interface Engineering helped to overcome the 2D semiconductor bottleneck

Traditional silicon semiconductor technology is gradually reaching its physical limitations, and 2D semiconductors are considered a method for further expansion. TSMC, in collaboration with National Yang Ming Chiao Tung University, developed a monolayer molybdenum disulfide (MoS₂) top-grade transistor and, in such a way, minimized the standard challenges.

Insights into the New Technology

Because of silicon transistors' scaling limits, researchers are trying to explore alternative variants, and monolayer MoS₂ is now the most promising one. This alternative enables the creation of more power-efficient and smaller transistors. The only issue is that 2D semiconductors require an ultrathin gate dielectric, which can result in some degradation of device performance.

To minimize this issue, researchers redesigned the interface via epitaxial interface engineering. In the new approach, an ultrathin aluminum layer is deposited on a monolayer of MoS₂ with vacuum technology and then oxidized. Such an approach can guarantee high transconductance and, at the same time, an ultrathin structure.

According to the revealed results, such technology delivers exceptional operational stability and ultralow leakage current at a rather minimal dimension. That means the design of lower-power and faster electronic devices, while at the same time, the seamless integration with existing manufacturing processes remains.   

TSMC continues to advance the technology, establishing compatible integration for the next-generation 2D transistors. Intel has also been significantly impacting 2D transistor research. Of course, commercialization is still only the long-term perspective, but such research can minimize the risks connected with the eventual production of chips based on 2D materials.

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