First dual-architectural processor from IBM

IBM's next-generation chips will stand out for their dual instruction set architecture within the core, enabling simultaneous execution of Arm and Z software.

At the Hot Chips 2026 conference, IBM announced plans for next-generation processors with a dual-ISA core. Such an approach will allow running software on both Arm-based processors and Z-based chips.

Key Insights into the New Architecture 

The major principle of the new approach is the integration of the Arm ISA architecture directly in the mainframe cores. This will help to unite the Arm software ecosystem with the mainframe’s benefits such as improved performance, scalability, security, and higher availability.

As for now, IBM offers two variants for enterprise mainframes, such as LinuxOne as an enterprise server and IBM Z for traditional enterprise computing.

Also, the company has presented an 11-core IBM Z processor which was designed for higher reliability and improved performance characteristics. IBM Z cores will be manufactured using a 2-nm process and will operate at a frequency of over 5.7 GHz. As for the other features, a large 36 MB L2 cache combined with virtual L3/L4 caches will be available.

The accelerator IP blocks will contain dedicated embedded DPU as well as accelerators for AI, sorting, compression, and cryptography. All these capabilities will be open for processors based on Arm. With that being said, customers can run the Arm ecosystem alongside Z workloads.

So, IBM is combining Linux and Arm on a single platform. As for now, there are no specific intentions to support other OSs. The actual release of the next-generation Z chips should not be expected soon, but the development has already begun.   

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