NASA Tests Next-Gen Processors 500 Times More Powerful Than Current Standards
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12:36, 14.05.2026
NASA is testing the HPSC processor, which is set to become the central digital core of interplanetary expeditions. Testing started back in February 2026 and has already demonstrated that the system's performance exceeds that of current analogs by 500 times.
RISC-V Architecture
The project is based on the 64-bit SiFive RISC-V architecture. Its foundation is the PIC64-HPSC chip line, featuring ten computing cores and support for AI, vector computing, virtualization, and modern high-speed data transfer interfaces.
This level of computing power will allow spacecraft on the Moon or Mars to make decisions autonomously, without waiting for commands from Earth; signal delays can be significant.
Extreme Testing
Engineers are subjecting the chip to loads that simulate the harshest conditions in space, including radiation, extreme temperatures, vibrations, and shock loads mimicking a rocket launch. The team is verifying both the resilience of the hardware and the stability of the software under potential failure conditions.
According to preliminary results, the architecture is performing stably and in accordance with expectations.
Upon completion of all trials, the HPSC platform will also become available to private aerospace companies.
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