SK Hynix plans to integrate tiny CPUs in its SSD controllers for higher efficiency

SK Hynix is now working on SSD controller architecture to improve efficiency. The company has introduced H-TPU (Hynix Transaction Processing Unit). This is a very tiny programmable processor for repetitive tasks within the SSD controller.

The real issues are now in the controller  

Due to the high amounts of information that should be processed, general-purpose CPU cores are becoming increasingly inefficient in the completion of certain tasks. They are considered to be comparatively flexible, powerful, and large where the major part of the workload is simple and very repetitive. H-TPU functions on the basis of four-stage in-order pipelines and can perform these repetitive tasks fairly quickly. Lots of H-TPUs can perfectly fit into a relatively small area, it can be allocated on 4 percent of the chip area of the standard CPU core. As for the power consumption, it is only 2.5 percent; the comparison is done between the individual cores.

The standard controller CPUs will not be completely replaced by H-TPU. The standard CPUs are intended for the completion of more complex tasks. Whereas tiny processors are used for metadata operations, write/read command processing, and other standardized routines. This is predominantly impacting the acceleration, because simple tasks are distributed across tiny cores, whereas more complex tasks are processed by CPUs.

The company is talking about almost 100 H-TPUs in the architecture, and that sounds like a lot. However, these mini-cores are so tiny, and the simplicity of their functioning makes this process possible. In addition to this, parallelism can be used more actively in such an approach.  

In the long-term perspective, H-TPU can be used in different NAND products, new enterprise SSD controllers, and other memory products. This starts a totally new phase of internal architecture modification for data center SSDs.

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